Tetra Replication

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verpies

Re: Tetra Replication « Reply #200 on: 2025-03-08, 20:22:02 »

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Posts: 3756

Quote from: bte on 2025-03-08, 14:57:18

Need to get timing board sent out for fabrication...

Does that mean that you have its schematic?
If "yes", can we see it?

bte

Re: Tetra Replication « Reply #201 on: 2025-03-08, 23:29:10 »

Group: Moderator
Sr. Member

Posts: 310

Quote from: verpies on 2025-03-08, 20:22:02

Does that mean that you have its schematic?
If "yes", can we see it?

Sure, here is the timing board schematic. I haven't finished the board so if there is something you see that could be better please let me know.

I opted to use a NOR gate approach to reset the flip flops to avoid the ring counter getting out of sync. With the NOR gate, it auto-corrects itself should it get out of sync, and ensures a 1 propagates properly. Since the NOR gate slightly delays one of the phases I opted to feed the other two out of the same NOR gate chip (via the Q/ output on different circuits within the NOR gate package) to equalize the delay to all phases.

The driver chip is capable of driving multiple 50 ohm lines at 5V, so I opted to pair them up to lower chip count and ensure uniform pulses for each phase to the A coil driver. There are going to be 3 separate A coil drivers, which will connect to coil A in parallel.

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Tetra Replication

timing-schematic.png (53.25 kB, 1215x707 - viewed 657 times.)

verpies	Re: Tetra Replication « Reply #202 on: 2025-03-09, 00:06:44 »
Group: Professor Hero Member Posts: 3756	It's a mistake not to use the finest step size timing chip DS1023S-25 for NMR purposes.

bte	Re: Tetra Replication « Reply #203 on: 2025-03-09, 00:16:34 »
Group: Moderator Sr. Member Posts: 310	Quote from: verpies on 2025-02-26, 18:03:54 When you apply a high frequency HV pulse to such coils, high electric current flows through these capacitances - not in the copper wire ! At high frequencies these capacitances dominate and the coil behaves more like a capacitor than a coil. This begs a question - why bother with a coil at all ? Why not build a good capacitor instead ? Found this that might offer more insight. Not enough known to speculate what exactly is going on yet - if I can get some positive results and document the parameters, maybe a better picture will unfold. I believe he did try using plates (as per a capacitor) rather than coils but didn't get a good result. Attached in more pertinent comments and a link to the extra correspondences. ------------------------ missed-chats (2).pdf (164.04 kB - downloaded 62 times.) Tetra Replication more-info.png (19.54 kB, 717x172 - viewed 632 times.)

verpies	Re: Tetra Replication « Reply #204 on: 2025-03-09, 00:43:10 »
Group: Professor Hero Member Posts: 3756	Quote from: bte on 2025-03-08, 23:29:10 I opted to use a NOR gate approach to reset the flip flops to avoid the ring counter getting out of sync. You are not using the NOR gate to reset the flip-flops in case of an error. You are using it for state decoding. That is very different than using NOR gates to reset the flip-flops via their asynchronous CLR or PReset inputs. Error correction implemented with gates and the asynchronous flip-flop inputs would look like this: IMO error correction is superfluous. « Last Edit: 2025-04-01, 00:45:55 by verpies »

bte	Re: Tetra Replication « Reply #205 on: 2025-03-09, 02:14:22 »
Group: Moderator Sr. Member Posts: 310	Are you sure that the d flip flops will preset and reset at the right time to garuntee proper operation?

verpies	Re: Tetra Replication « Reply #206 on: 2025-03-09, 21:25:21 »
Group: Professor Hero Member Posts: 3756	Quote from: bte on 2025-03-09, 02:14:22 Are you sure that the d flip flops will preset and reset at the right time to garuntee proper operation? Yes Also, despite them being logically equivalent, one method of connecting unused inputs of NOR gates is faster because, in a CMOS circuit, charging two gate input capacitances is slower than one. Also, didn't you want to generate the clock on-board with additional DS1023 chips ?

bte	Re: Tetra Replication « Reply #207 on: 2025-03-09, 21:46:01 »
Group: Moderator Sr. Member Posts: 310	Quote from: verpies on 2025-03-09, 21:25:21 Yes Also, despite them being logically equivalent, one method of connecting unused inputs of NOR gates is faster because, in a CMOS circuit, charging two gate input capacitances is slower than one. Also, didn't you want to generate the clock on-board with additional DS1023 chips ? Okay, I reverted to your set/preset version. I think this should work, does it look okay? The DS1023 has identical pinouts for the different range versions of the chip, so disregard the 50ns version used here. Edit: hopefully the labels makes the schematic easier to read. ------------------------ Tetra Replication timing-schematic2.png (58.76 kB, 1245x729 - viewed 588 times.)

verpies	Re: Tetra Replication « Reply #208 on: 2025-03-09, 23:23:13 »
Group: Professor Hero Member Posts: 3756	Why do you think that the DS1023 chips cannot drive the MOSFET drivers directly and you need the THS3111 as buffers ?

bte	Re: Tetra Replication « Reply #209 on: 2025-03-09, 23:29:54 »
Group: Moderator Sr. Member Posts: 310	Quote from: verpies on 2025-03-09, 23:23:13 Why do you think that the DS1023 chips cannot drive the MOSFET drivers directly and you need the THS3111 as buffers ? They'll be driving 50 ohm coax into the driver boards. I'm setting it up so that all of the lines are terminated properly so at high speed it doesn't cause any glitches. The point of separating the boards is so I can tune the coax lengths to account for any delay mismatches in the driver boards. Also to experiment with delayed signals in the future if need be. Trying to make it modular.

verpies	Re: Tetra Replication « Reply #210 on: 2025-03-09, 23:46:00 »
Group: Professor Hero Member Posts: 3756	Which end of the coax cable do you plan to terminate with 50Ω ?

bte	Re: Tetra Replication « Reply #211 on: 2025-03-09, 23:50:54 »
Group: Moderator Sr. Member Posts: 310	driver side

verpies	Re: Tetra Replication « Reply #212 on: 2025-03-10, 19:47:37 »
Group: Professor Hero Member Posts: 3756	You might find the attached chapter about Intercard Connections informative: ------------------------ Intercard connections.pdf (662.25 kB - downloaded 77 times.)

verpies	Re: Tetra Replication « Reply #213 on: 2025-03-17, 06:25:51 »
Group: Professor Hero Member Posts: 3756	Look at the rise and fall times as well as pulse widths, that this guy is able to achieve with modern SiC MOSFETs and freewheeling flyback diode. https://youtu.be/Od8XmFk3Tm0 https://youtu.be/ElTTOsj3y-Q?t=1703 « Last Edit: 2025-04-03, 14:29:32 by verpies »

Allcanadian

Re: Tetra Replication « Reply #214 on: 2025-06-14, 02:43:09 »

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Posts: 2768

Cool thread and I found many supposed "computer experts" have no idea what a logic gate is. Which is kind of like a chef having no idea what an oven or frying pan is.

This applies directly to free energy. Many suppose because they use a computer they can understand one. Yet 99.99% have literally no idea how the hardware or software actually works. So you think you understand how computers work?, neat I will just corrupt your boot files and see how you make out.

The problem here is many want to be experts who don't want to put in all the time and effort to achieve their goal whatever that may be.

For example, I spent months building and testing AC systems. AC motors/generators, transformers, grid tie systems, island mode systems, literally everything. Why?, because if one does not build it and test it one cannot reasonably claim to understand it. Otherwise it's just some person "claiming" to know something they do not actually know. It's a matter of integrity imo. To say I actually tested this so don't pretend to say you know different. This is what separates the wheat from the chaff.

AC

---------------------------

Comprehend and Copy Nature... Viktor Schauberger

“The first principle is that you must not fool yourself and you are the easiest person to fool.”― Richard P. Feynman

verpies	Re: Tetra Replication « Reply #215 on: 2025-06-19, 03:33:49 »
Group: Professor Hero Member Posts: 3756	If you understand logic gates so well then fix this clockless quadrature decoder circuit (without using intentional delay elements): This circuit takes two quadrature input signals A and B from an incremental rotary encoder (depicted below) and outputs a logic signal (X) that indicates which direction that encoder is turning (without intentional delay elements and without a clock). Forward: Reverse: You can see the simulation of this circuit here (click on the "Dir Switch") but this circuit does not work in practice. Most likely due to some race condition... In practice, this circuit can be implemented with the dual 74HC153 multiplexer and the 74HC139 demultiplexer (with the E__neg input tied low in order to make it into a 2-bit decoder). The 74HC139 features active-low outputs which are matched by NAND-based SR flip-flops which feature active-low inputs. The 74HC279 chip contains 4 such SR flip-flops. This makes this entire circuit implementable with 3 standard logic chips. « Last Edit: 2025-06-20, 04:34:17 by verpies »

Atti

Re: Tetra Replication « Reply #216 on: 2025-06-19, 13:34:35 »

Newbie

Posts: 19

I couldn't find a better place for it, so I'm putting it here (for those who are interested.) For my part, this is just a thought experiment for the next.

https://www.youtube.com/watch?v=f2_vGXL6h-k

I have seen some experimenters repeat the thought process of N. Tesla. A transformer driven in short pulses (or pulse packets) as an energy transfer device.
Testing whether there can be excess energy. Or whether it can be connected to the spatial ether.

For my part, the investigation of this was as follows. Is it possible for the two frequencies (primary/secondary) to interact but move separately. Primary pulse train/secondary sine wave.
That is, from the quote :

"... In order to amplify the electrical movement in the secondary winding as much as possible, it is essential that its inductive connection with the primary winding A should not be too close, as in conventional transformers, but should be loose to allow free oscillation - that is, their mutual inductance should be small ...""

Thus realizing (and looking for) the way forward.
Thank you.

Atti.

verpies	Re: Tetra Replication « Reply #217 on: 2025-06-19, 19:39:25 »
Group: Professor Hero Member Posts: 3756	Quote from: Atti on 2025-06-19, 13:34:35 I couldn't find a better place for it, so I'm putting it here Create a separate thread titled: "Pulsing a loosely coupled transformer". Quote from: Atti on 2025-06-19, 13:34:35 For my part, this is just a thought experiment for the next. https://www.youtube.com/watch?v=f2_vGXL6h-k What is unusual in this experiment ?

verpies	Re: Tetra Replication « Reply #218 on: 2025-06-20, 03:48:29 »
Group: Professor Hero Member Posts: 3756	Quote from: bte on 2025-03-08, 14:57:18 Wow the power supply arrived today! Great! The driver boards also shipped. Need to get timing board sent out for fabrication and order some solder paste/flux. What's going on with this ?

Atti	Re: Tetra Replication « Reply #219 on: 2025-06-20, 12:47:59 »
Newbie Posts: 19	Quote from: verpies on 2025-06-19, 19:39:25 What is unusual in this experiment ? I am genuinely glad that this is quite clear to others. I still have to learn.

verpies	Re: Tetra Replication « Reply #220 on: 2025-06-20, 14:49:30 »
Group: Professor Hero Member Posts: 3756	Quote from: Atti on 2025-06-20, 12:47:59 I am genuinely glad that this is quite clear to others. I still have to learn. How does that answer my question ?

lfarrand

Re: Tetra Replication « Reply #221 on: 2025-06-20, 17:46:19 »

Sr. Member

Posts: 282

Quote from: verpies on 2025-06-20, 03:48:29

What's going on with this ?

It worked very well and we'll never hear from him again?

chief kolbacict

Re: Tetra Replication « Reply #222 on: 2025-06-20, 18:17:49 »

Sr. Member

Posts: 333

Quote from: verpies on 2025-06-19, 03:33:49

If you understand logic gates so well

There are 2 inputs and 2 outputs (which are also the previous state) - in essence, the machine is guaranteed to be built on a 4-bit register + a 4->2 logical matrix. ps if you need protection against chatter (it is assumed that the speed will approach the chatter time), then you need a 6-bit register and a 6->4 matrix.

verpies	Re: Tetra Replication « Reply #223 on: 2025-06-20, 20:36:02 »
Group: Professor Hero Member Posts: 3756	Quote from: chief kolbacict on 2025-06-20, 18:17:49 There are 2 inputs and 2 outputs... 2 inputs and 1 output. Don't count the complementary output or intermediate ones.

verpies	Re: Tetra Replication « Reply #224 on: 2025-06-20, 20:44:31 »
Group: Professor Hero Member Posts: 3756	Quote from: chief kolbacict on 2025-06-20, 18:17:49 There are 2 inputs and 2 outputs... 2 inputs and 1 output. Don't count the complementary output or intermediate ones. Also, the circuit must be able to handle encoder's shaft oscillation, which can generate a waveform like this: