Does that mean that you have its schematic?
If "yes", can we see it?
Sure, here is the timing board schematic. I haven't finished the board so if there is something you see that could be better please let me know. I opted to use a NOR gate approach to reset the flip flops to avoid the ring counter getting out of sync. With the NOR gate, it auto-corrects itself should it get out of sync, and ensures a 1 propagates properly. Since the NOR gate slightly delays one of the phases I opted to feed the other two out of the same NOR gate chip (via the Q/ output on different circuits within the NOR gate package) to equalize the delay to all phases. The driver chip is capable of driving multiple 50 ohm lines at 5V, so I opted to pair them up to lower chip count and ensure uniform pulses for each phase to the A coil driver. There are going to be 3 separate A coil drivers, which will connect to coil A in parallel.
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Topic: Tetra Replication (Read 16407 times)
