Thanks verpies, i build this latest 74HC390 divider and it worked great, see picture below. The duty cycle of the 25kHz output signal when directly fed by the optical receiver is 20%, which is enough for your PLL designed circuit (modified front-end see here) to lock on to and to present good output signals from the TL494, see screenshot below. Yellow the 74HC3890 output signal purple and blue the TL494 output signals (set to 33% duty cycle). Next i will cut this divider PCB to make it smaller and intergrate it into the modified verpies PLL / TL494 print. Then either directly drive some MOSFETs via drivers, or use an already working (Vasik design) print by modifying it to accept these new TL494 signals for input. Things are slow here due to the summer and by the looks of it not only here Itsu
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